;
;	$Revision:   1.3  $
;	$Date:   12 Oct 1989  8:47:04  $
;
;***************************************************************************
;* Copyright (C) 1988 by Phoenix Technologies Ltd.  This program           *
;* contains proprietary and confidential information.  All rights reserved *
;* except as may be permitted by prior written consent.                    *
;***************************************************************************
; sys0012.ADF
; This file contains the Hardware test features for the C&T280 chipset.

AdapterId 0012h
AdapterName " C&T Internal Features "
NumBytes 0

NamedItem
 Cmos 42h ChipReg 8Eh
 Prompt "Processor clock speed"
 Choice "25 MHz     8Eh - 01XXXX10" pos[0]=01XXXX10b
 Choice "20 MHz     8Eh - 01XXXX01" pos[0]=01XXXX01b
 Choice "16 MHz     8Eh - 00XXXX00" pos[0]=00XXXX00b
 Help "Processor clock speed."

NamedItem
 Cmos 42h ChipReg 8Eh
 Prompt "On board peripheral wait states"
 Choice "1          8Eh - 0XXX00XX" pos[0]=0XXX00XXb
 Choice "4          8Eh - 0XXX11XX" pos[0]=0XXX11XXb
 Choice "3          8Eh - 0XXX10XX" pos[0]=0XXX10XXb
 Choice "2          8Eh - 0XXX01XX" pos[0]=0XXX01XXb
 Help "Each wait state is 125ns at 16Mhz, 100ns at 20Mhz, and 120ns at 25Mhz
for the CPU, DMA and Master cycles. This controls the wait states for accesses
made to the Interrupt Controller, Real Time Clock, Keyboard Controller, 
Floppy Disk Controller, Serial Port, CMOS SRAM, and the Timer."

NamedItem
 Cmos 48h ChipReg B9h CTMemSize
 Prompt "Memory size"
 Choice "1Mb  (1-256)     B9h - 100000XX"  pos[0]=100000XXb
 Choice "2Mb  (2-256)     B9h - 101000XX"  pos[0]=101000XXb
 Choice "3Mb  (3-256)     B9h - 101100XX"  pos[0]=101100XXb
 Choice "4Mb  (4-256)     B9h - 101101XX"  pos[0]=101101XXb
 Choice "6Mb  (2-256/1-1MB) B9h - 101110XX"  pos[0]=101110XXb
 Choice "10Mb (2-256/2-1MB) B9h - 101111XX"  pos[0]=101111XXb
 Choice "5Mb  (1-256/1-1MB) B9h - 011000XX"  pos[0]=011000XXb
 Choice "4Mb  (1-1MB)     B9h - 110000XX"  pos[0]=110000XXb
 Choice "8Mb  (2-1MB)     B9h - 111000XX"  pos[0]=111000XXb
 Choice "12Mb (3-1MB)     B9h - 111110XX"  pos[0]=111110XXb
 Choice "16Mb (4-1MB)     B9h - 111111XX"  pos[0]=111111XXb
 Help "Select the number of 256Kb SIMMs and 1MB SIMMs on the board."

NamedItem
 Cmos 48h ChipReg B9h
 Prompt "Number of -RAS precharge cycles"
 Choice "Disabled   B9h - XXXXXX10"  pos[0]=XXXXXX10b
 Choice "3 CPU CLK2 B9h - XXXXXX01"  pos[0]=XXXXXX0Xb
 Choice "5 CPU CLK2 B9h - XXXXXX11"  pos[0]=XXXXXX1Xb
 Help "When enabled this causes -RAS precharge during I/O or idle cycles."

NamedItem
 Cmos 43h ChipReg 8Fh
 Prompt "Matched memory cycle"
 Choice "Default    8Fh - 00000XX0" pos[0]=00000XX0b
 Choice "Fast       8Fh - 00000XX1" pos[0]=00000XX1b
 Help "The Default (0) is 187.5ns cycles at 16Mhz, 200ns cycles at 20 and 25Mhz. 
When set to Fast, the cycles are 187.5ns at 16Mhz, 150ns at 20Mhz and 160 at
25Mhz."

NamedItem
 Cmos 43h ChipReg 8Fh
 Prompt "Fast VGA cycle"
 Choice "Disabled   8Fh - 00000X0X" pos[0]=00000X0Xb
 Choice "Enabled    8Fh - 00000X1X" pos[0]=00000X1Xb
 Help "The fast VGA cycle may be extended by using CHRDY. The default is
disabled."

NamedItem
 Cmos 43h ChipReg 8Fh
 Prompt "Data Ready Extend"
 Choice "Enabled    8Fh - 000001XX" pos[0]=000001XXb
 Choice "Disabled   8Fh - 000000XX" pos[0]=000000XXb
 Help "When enabled, one wait state is inserted after the 82C321 samples CHRDY
active. It provides extended data set-up time for read cycles only."

NamedItem
 Cmos 44h ChipReg B4h
 Prompt "RAM at 00000h-1FFFFh is on"
 Choice "System Board   B4h - XXXXXXX1" pos[0]=XXXXXXX1b
 Choice "I/O Channel    B4h - XXXXXXX0" pos[0]=XXXXXXX0b
 Help "Select where the RAM at this address is located."

NamedItem
 Cmos 44h ChipReg B4h
 Prompt "RAM at 20000h-3FFFFh is on"
 Choice "System Board   B4h - XXXXXX1X" pos[0]=XXXXXX1Xb
 Choice "I/O Channel    B4h - XXXXXX0X" pos[0]=XXXXXX0Xb
 Help "Select where the RAM at this address is located."

NamedItem
 Cmos 44h ChipReg B4h
 Prompt "RAM at 40000h-5FFFFh is on"
 Choice "System Board   B4h - XXXXX1XX" pos[0]=XXXXX1XXb
 Choice "I/O Channel    B4h - XXXXX0XX" pos[0]=XXXXX0XXb
 Help "Select where the RAM at this address is located."

NamedItem
 Cmos 44h ChipReg B4h
 Prompt "RAM at 60000h-7FFFFh is on"
 Choice "System Board   B4h - XXXX1XXX" pos[0]=XXXX1XXXb
 Choice "I/O Channel    B4h - XXXX0XXX" pos[0]=XXXX0XXXb
 Help "Select where the RAM at this address is located."

NamedItem
 Cmos 44h ChipReg B4h
 Prompt "RAM at 80000h-9FFFFh is on"
 Choice "System Board   B4h - XXX1XXXX" pos[0]=XXX1XXXXb
 Choice "I/O Channel    B4h - XXX0XXXX" pos[0]=XXX0XXXXb
 Help "Select where the RAM at this address is located."

NamedItem
 Cmos 45h ChipReg B5h
 Prompt "Enable Shadow RAM at C0000h-CFFFFh"
 Choice "RAM enabled    B5h - XX1XXXXX" pos[0]=XX1XXXXXb
 Choice "ROM enabled    B5h - XX0XXXXX" pos[0]=XX0XXXXXb
 Help "Select whether Shadow RAM at C0000h-CFFFFh will be in ROM or RAM."

NamedItem
 Cmos 45h ChipReg B5h
 Prompt "Write Protect RAM at C0000h-CFFFFh"
 Choice "Write enabled  B5h - 0XXXXXXX" pos[0]=0XXXXXXXb
 Choice "Write disabled B5h - 1XXXXXXX" pos[0]=1XXXXXXXb
 Help "Select whether to write enable or write disable at B5h-0XXXXXXX."

NamedItem
 Cmos 45h ChipReg B5h
 Prompt "Enable Shadow RAM at D0000h-DFFFFh"
 Choice "RAM enabled    B5h - XXX1XXXX" pos[0]=XXX1XXXXb
 Choice "ROM enabled    B5h - XXX0XXXX" pos[0]=XXX0XXXXb
 Help "Select whether Shadow RAM at D0000h-DFFFFh will be in ROM or RAM."

NamedItem
 Cmos 45h ChipReg B5h
 Prompt "Write Protect RAM at D0000h-DFFFFh"
 Choice "Write enabled  B5h - X0XXXXXX" pos[0]=X0XXXXXXb
 Choice "Write disabled B5h - X1XXXXXX" pos[0]=X1XXXXXXb
 Help "Select whether to write enable or write disable at B5h-0XXXXXXX."

NamedItem
 Cmos 49h ChipReg BAh
 Prompt "DRAM write access wait states"
 Choice "1          BAh - XX1XXXXX" pos[0]=XX1XXXXXb
 Choice "0          BAh - XX0XXXXX" pos[0]=XX0XXXXXb
 Help "Select the number of DRAM write access wait states."

NamedItem
 Cmos 49h ChipReg BAh
 Prompt "DRAM read access wait states"
 Choice "1          BAh - X1XXXXXX" pos[0]=X1XXXXXXb
 Choice "0          BAh - X0XXXXXX" pos[0]=X0XXXXXXb
 Help "Select the number of DRAM read access wait states."

NamedItem
 Cmos 49h ChipReg BAh
 Prompt "Page/Interleaved Mode"
 Choice "Enabled    BAh - 1XXXXXXX" pos[0]=1XXXXXXXb
 Choice "Disabled   BAh - 0XXXXXXX" pos[0]=0XXXXXXXb
 Help "Select 'Enabled' if you wish to have page/interleaved mode."

NamedItem
 Cmos 4Ah ChipReg BBh
 Prompt "MRDY during MASTER/CPU/DMA cycles"
 Choice "Enable     BBh - XXXXX100"   pos[0]=XXXXX100b
 Choice "Disable    BBh - XXXXX000"   pos[0]=XXXXX000b
 Help "Select 'Enable' if you wish to have MRDY during RAM cycles."

NamedItem
 Cmos 4Ah ChipReg BBh
 Prompt "Internal delay line usage"
 Choice "Enable     BBh - XXXX1X00"  pos[0]=XXXX1X00b
 Choice "Disable    BBh - XXXX0X00"  pos[0]=XXXX0X00b
 Help "Select 'Enable' if you wish to have internal delay line usage."

NamedItem
 Cmos 4Ah ChipReg BBh
 Prompt "RAS hold time in DMA/MASTER cycles"
 Choice "2 clk2     BBh - XX00XX00"   pos[0]=XX00XX00b
 Choice "2.5 clk2   BBh - XX01XX00"   pos[0]=XX01XX00b
 Choice "3 clk2     BBh - XX10XX00"   pos[0]=XX10XX00b
 Choice "3.5 clk2   BBh - XX11XX00"   pos[0]=XX11XX00b
 Help "Select the RAS hold time in DMA/MASTER cycles."

NamedItem
 Cmos 4Ah ChipReg BBh
 Prompt "MRDY during refresh"
 Choice "Enable     BBh - X1XXXX00"   pos[0]=X1XXXX00b
 Choice "Disable    BBh - X0XXXX00"   pos[0]=X0XXXX00b
 Help "Select 'Enable' if you wish to have MRDY during refresh."

NamedItem
 Cmos 4Ah ChipReg BBh
 Prompt "Column address to CAS delay"
 Choice "1 clk2     BBh - 1XXXXX00"   pos[0]=1XXXXX00b
 Choice ".5 clk2    BBh - 0XXXXX00"   pos[0]=0XXXXX00b
 Help "Select the column address to CAS delay."

NamedItem
 Cmos 4Eh ChipReg BFh
 Prompt "Page mode RAS time-out counter"
 Choice "Disabled   BFh - XXXXX0XX" pos[0]=XXXXX0XXb
 Choice "Enabled    BFh - XXXXX1XX" pos[0]=XXXXX1XXb
 Help "Select 'Enabled' if you wish to have a page mode RAS time-out counter."

NamedItem
 Cmos 49h ChipReg BAh
 Prompt "EMS memory access wait states"
 Choice "1          BAh - XXXX1XXX" pos[0]=XXXX1XXXb
 Choice "0          BAh - XXXX0XXX" pos[0]=XXXX0XXXb
 Help "One wait state at 16Mhz is 125ns, at 20Mhz 100ns, and at 25Mhz 120ns."

NamedItem
 Cmos 49h ChipReg BAh
 Prompt "EMS enable"
 Choice "Off        BAh - XXX0XXXX" pos[0]=XXX0XXXXb
 Choice "On         BAh - XXX1XXXX" pos[0]=XXX1XXXXb
 Help "EMS is disabled if set at off, else EMS is enabled."

NamedItem
 Cmos 4Bh ChipReg BCh
 Prompt "EMS page register I/O base address"
 Choice "208h       BCh - XXXX0000"      pos[0]=XXXX0000b io 208h-209h
 Choice "218h       BCh - XXXX0001"      pos[0]=XXXX0001b io 218h-219h
 Choice "258h       BCh - XXXX0101"      pos[0]=XXXX0101b io 258h-259h
 Choice "268h       BCh - XXXX0110"      pos[0]=XXXX0110b io 268h-269h
 Choice "2A8h       BCh - XXXX1010"      pos[0]=XXXX1010b io 2A8h-2A9h
 Choice "2B8h       BCh - XXXX1011"      pos[0]=XXXX1011b io 2B8h-2B9h
 Choice "2E8h       BCh - XXXX1110"      pos[0]=XXXX1110b io 2E8h-2E9h
 Help "Select the EMS page register I/O base address."

NamedItem
 Cmos 4Bh ChipReg BCh
 Prompt "EMS Base Address"
 Choice "C0000h-CC000h  BCh - 0000XXXX" pos[0]=0000XXXXb mem 0C0000h-0CC000h
 Choice "C4000h-D0000h  BCh - 0001XXXX" pos[0]=0001XXXXb mem 0C4000h-0D0000h
 Choice "C8000h-D4000h  BCh - 0010XXXX" pos[0]=0010XXXXb mem 0C8000h-0D4000h
 Choice "CC000h-D8000h  BCh - 0011XXXX" pos[0]=0011XXXXb mem 0CC000h-0D8000h
 Choice "D0000h-DC000h  BCh - 0100XXXX" pos[0]=0100XXXXb mem 0D0000h-0DC000h
 Choice "D4000h-E0000h  BCh - 0101XXXX" pos[0]=0101XXXXb mem 0D4000h-0E0000h
 Choice "D8000h-E4000h  BCh - 0110XXXX" pos[0]=0110XXXXb mem 0D8000h-0E4000h
 Choice "DC000h-E8000h  BCh - 0111XXXX" pos[0]=0111XXXXb mem 0DC000h-0E8000h
 Choice "E0000h-EC000h  BCh - 1000XXXX" pos[0]=1000XXXXb mem 0E0000h-0EC000h
 Help "Select the EMS Base Address."

NamedItem
 Cmos 4Fh ChipReg BFh
 Prompt "EMS memory space"
 Choice "1 Mb to top    BFh - 0000XXXX"  pos[0]=0000XXXXb
 Choice "1 Mb to top    BFh - 0001XXXX"  pos[0]=0001XXXXb
 Choice "2 Mb to top    BFh - 0010XXXX"  pos[0]=0010XXXXb
 Choice "3 Mb to top    BFh - 0011XXXX"  pos[0]=0011XXXXb
 Choice "4 Mb to top    BFh - 0100XXXX"  pos[0]=0100XXXXb
 Choice "5 Mb to top    BFh - 0101XXXX"  pos[0]=0101XXXXb
 Choice "6 Mb to top    BFh - 0110XXXX"  pos[0]=0110XXXXb
 Choice "7 Mb to top    BFh - 0111XXXX"  pos[0]=0111XXXXb
 Choice "8 Mb to top    BFh - 1000XXXX"  pos[0]=1000XXXXb
 Choice "9 Mb to top    BFh - 1001XXXX"  pos[0]=1001XXXXb
 Choice "10 Mb to top   BFh - 1010XXXX"  pos[0]=1010XXXXb
 Choice "11 Mb to top   BFh - 1011XXXX"  pos[0]=1011XXXXb
 Choice "12 Mb to top   BFh - 1100XXXX"  pos[0]=1100XXXXb
 Choice "13 Mb to top   BFh - 1101XXXX"  pos[0]=1101XXXXb
 Choice "14 Mb to top   BFh - 1110XXXX"  pos[0]=1110XXXXb
 Choice "15 Mb to top   BFh - 1111XXXX"  pos[0]=1111XXXXb
 Help "Top of memory is no more than 16Mb."

NamedItem
 Cmos 42h ChipReg 8Eh
 Prompt "Math Ready control"
 Choice "82C321     8Eh - XX00XXXX" pos[0]=XX00XXXXb
 Choice "NDP        8Eh - XX10XXXX" pos[0]=XX10XXXXb
 Help "If set to NDP then the 80387 generates the Math Ready. If set to   
82C321, the 82C321 generates the Math Ready signal."

