; ; $Revision: 1.4 $ ; $Date: 23 Sep 1988 13:14:44 $ ; ;*************************************************************************** ;* Copyright (C) 1988 by Phoenix Technologies Ltd. This program * ;* contains proprietary and confidential information. All rights reserved * ;* except as may be permitted by prior written consent. * ;*************************************************************************** ; @0021.ADF ; This file contains the end-user features for the C&T250 chipset. ; Its appended to the end of the @0000.ADF. ;****************************************************************** ; CMOS 7ah - BIOS information. ; bit 0 = Shadow BIOS ROM ; bit 1 = Enable Bad Block Remap ; bit 2 = Enable Dynamic Memory Determination ; bit 3 = Reserved ; bit 4 = Reserved ; bit 5 = Reserved ; bit 6 = Reserved ; bit 7 = Reserved ; CMOS 7bh - Shadow Adapter ROMs: ; 00 = No shadow ; FF = Shadow ;****************************************************************** NamedItem Cmos 7ah Prompt "Phoenix BIOS ROM shadowing" Choice "Disabled" pos[0]=XXXXXXX0b Choice "Enabled" pos[0]=XXXXXXX1b Help "If BIOS ROM shadowing is enabled, the Phoenix ROM BIOS will attempt to execute from a copy of itself in RAM. Since the RAM is faster than ROM, programs that use BIOS functions will subsequently execute faster. If you have less than 1 Megabyte (1024 KB) of memory, shadowing cannot be enabled." NamedItem Cmos 7bh Prompt "Adapter ROM shadowing" Choice "Disabled" pos[0]=00000000b Choice "Enabled" pos[0]=11111111b Help "If Adapter ROM shadowing is enabled, and the Adapter board permits shadowing to occur, the Phoenix BIOS will copy the Adapter ROM into faster RAM. This will result in faster execution of the programs on the Adapter boards. If you have less than 1 Megabyte (1024 KB) of memory, shadowing cannot be enabled." NamedItem Cmos 7ah Prompt "Bad Memory Block Remapping" Choice "Disabled" pos[0]=XXXXXX0Xb Choice "Enabled" pos[0]=XXXXXX1Xb Help "If Bad Block Remapping is enabled then the ROM BIOS will attempt to relocate good memory into memory that fails parity checks. This will permit all the good memory to be sequentially addressable and the failing memory will be disabled. If this feature is disabled then memory will not be available beyond the first failing memory block."